The present invention relates to an overcurrent detecting device for detecting an overcurrent flowing to a DC circuit using a semiconductor switch and more particularly to a technique capable of detecting an overcurrent with high precision corresponding to a change in an ON-state resistance of a semiconductor switch if any.
For example, in a DC circuit provided with a semiconductor switch such as an FET between a DC power supply and a load of a motor or a lamp and serving to turn ON/OFF the semiconductor switch, thereby controlling the driving operation of the load, an overcurrent detecting circuit is provided for detecting an overcurrent such as a short-circuit current when it flows and for immediately disconnecting the semiconductor switch to protect the circuit when detecting the overcurrent.
FIG. 3 is a circuit diagram showing the structure of a load driving circuit mounting a related overcurrent detecting circuit. A DC power supply VB shown in FIG. 3 is a battery to be mounted on a vehicle, for example, and a load 101 is a motor for driving a power window or various lamps which is/are mounted on the vehicle, for example, and the DC power supply VB and the load 101 are connected to each other through an MOS type FET (T101).
Moreover, a voltage V1 is applied to an output terminal on the positive side of the DC power supply VB and the output terminal on the positive side is connected to a terminal of an IC circuit 102. Furthermore, the output terminal on the positive side of the DC power supply VB is grounded through a series circuit of resistors R101 and R102, and a node (a voltage V4) is connected to a terminal b of the IC circuit 102.
Furthermore, the FET (T101) has a gate connected to a terminal c of the IC circuit 102 and a source (a voltage V2) connected to a terminal d of the IC circuit 102.
The IC circuit 102 includes a series connection circuit having a resistor R103, an FET (T102) and a resistor R105, and one of the ends of the resistor R103 is connected to the terminal a (that is, the output terminal on the positive side of the DC power supply VB) and one of the ends of the resistor R105 is grounded. Furthermore, the IC circuit 102 has an amplifier (AMP101), and a drain (a voltage V3) of the FET (T102) is connected to an input terminal on the positive side of the amplifier (AMP101), the terminal d, that is, a source (a voltage V2) of the FET (T101) is connected to an input terminal on the negative side of the amplifier (AMP101) and an output terminal of the amplifier (AMP101) is connected to the gate of the FET (T102).
Moreover, a comparator (CMP101) is provided, and a source of the FET (T102) is connected to an input terminal on the negative side of the comparator (CMP101), and the terminal b, that is, the node of the resistors R101 and R102 is connected to an input terminal on the positive side of the comparator (CMP101).
Furthermore, the IC circuit 102 includes a driver circuit 103, and an output terminal of the driver circuit 103 is connected through a resistor R110 to the terminal c, that is, the gate of the FET (T101).
By the control of the output signal of the driver circuit 103, a driving signal is supplied to the gate of the FET (T101) and the FET (T101) is thus turned ON/OFF.
A voltage VDS between the drain and the source of the FET (T101) when the FET (T101) is turned ON can be expressed in the following equation (1), wherein an ON-state resistance of the FET (T101) is represented by Ron and a drain current is represented by ID.VDS=V1−V2=Ron*ID  (1)
The amplifier (AMP 101) in the IC circuit 102 outputs a control signal to the gate of the FET (T102) in such a manner that the voltage V2 is equal to the voltage V3, thereby controlling a current I1 to flow to the series circuit constituted by the resistor R103. Therefore, a voltage generated on both ends of the resistor R103 is controlled to be equal to the voltage VDS between the drain and the source.
For example, if the resistance value of the resistor R105 is set to be 100 times as great as that of the resistor R103 (for example, R103=100Ω, R105=10KΩ), furthermore, a voltage V5 is obtained by amplifying the voltage VDS to be 100 times as great. This can be expressed in the following equation (2).V5=(R5/R3)*Ron*ID  (2)
The voltage V5 is supplied to the input terminal on the negative side of the comparator (CMP101) and the voltage (a reference voltage) V4 obtained by dividing the voltage of the DC power supply VB by the resistors R101 and R102 is supplied to the input terminal on the positive side. When the voltage V5 is higher than the voltage V4, therefore, the output signal of the comparator (CMP101) is inverted. More specifically, when an overcurrent flows to the load 101 so that the current ID is increased, the voltage V5 is increased by the equation (2) and the voltage V4 is exceeded so that the output signal of the comparator (CMP101) is inverted. If the signal is detected to disconnect the FET (T101), consequently, it is possible to protect the load 101 and a circuit connected thereto.
There are various types of loads to be controlled by a semiconductor switch, and an FET is selected corresponding to the type of the load, particularly, the magnitude of a load current. When the type of the FET (T101) is varied, accordingly, the ON-state resistance Ron is changed. As is understood from the equation (2), therefore, the voltage V5 is varied. If the load 101 is identical, moreover, the magnitude of the current ID is not varied in the decision of the current ID to be an overcurrent. In order to decide the same current ID to be the overcurrent, therefore, it is necessary to change a value of (R5/R3) or the reference voltage V4 for the decision of the overcurrent corresponding to a new ON-state resistance Ron.
Since these changes cannot be carried out in the IC circuit 102, they are to be performed on the outside of the IC circuit 102. Therefore, it is impossible to incorporate the resistors R101 and R102 in the IC circuit 102.
If there is employed a structure in which the resistors R101 and R102 are provided on the outside of the IC circuit 102, however, it is necessary to provide at least one connecting terminal in the IC circuit 102 (terminal b). FIG. 3 shows only one load circuit for simplicity of explanation. If instrumentation equipment for a vehicle is supposed, there are actually ten load circuits or more. In such a case, consequently, it is necessary to provide ten connecting terminals or more in the IC circuit 102. Thus, there is a drawback that the size of an IC package is increased and that of a chip size is increased, resulting in an increase in a cost.
As described above, in the case in which the FET (T101) to be the semiconductor switch provided in the load circuit is varied so that the ON-state resistance Ron is changed, it is necessary to set a desired overcurrent decision value corresponding to a new ON-state resistance Ron. For this purpose, it is necessary to change the resistance values of the resistors R101 and R102, thereby setting the overcurrent decision value. This operation is to be carried out on the outside of the IC circuit 102 and two regulating terminals (terminals a and b) are to be provided in the IC circuit 102. Consequently, there is a problem in that the size of a package is increased.